A NOBLE DEAD TIME MINIMIZATION ALGORITHM FOR REDUCING THE INVERTER SWITCHING LOSSES

Title
A NOBLE DEAD TIME MINIMIZATION ALGORITHM FOR REDUCING THE INVERTER SWITCHING LOSSES
Authors
김영석
Keywords
NOBLE DEAD TIME MINIMIZATION ALGORITHM, INVERTER SWITCHING LOSSES
Issue Date
1998
Publisher
전력전자학회
Series/Report no.
ICPE(ISPE)논문집;
Abstract
In this paper, a noble dead time minimization algorithm is presented for developing the outputs of inverters. The adverse effects of the dead time are examined. The principle of the proposed algorithm is explained with the conduction modes of the output currents. The H/W and the S/W construction method of the propoesd algorithm are also presented. The validity of the proposed algorithm is verified by comparing simulation and experimental results with those of the conventional methods. It can be concluded from the results that the proposed algorithm have the virtue which is able to reduce the numbers of inverter switching and the harmonics in the output voltages, and which make the output voltage equal to the reference value.
URI
http://uci.or.kr/G300-cX551015.vn0p518
http://dspace.inha.ac.kr/handle/10505/29395
Appears in Collections:
College of Engineering(공과대학) > Electrical Engineering (전기공학) > Local Access Journal, Report (전기공학 논문, 보고서)

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