Contribution of Interface States and Oxide Traps to the Negative Bias Temperature Instability of High-k pMOSFETs

Title
Contribution of Interface States and Oxide Traps to the Negative Bias Temperature Instability of High-k pMOSFETs
Authors
Choi, R.
Keywords
Hafnium oxide, interface states, negative bias temperature instability (NBTI), oxide traps
Issue Date
2009-03
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Abstract
Negative bias temperature instability (NBTI) in MOSFETs with high-dielectric-constant (k) gate dielectrics has been investigated using a novel pulse NBTI measurement technique. This technique enabled the separation of the contribution of interface states (N-it) from that of oxide traps (N-ot) to NBTI behavior by varying the measurement time (t(m)) and the delay time (t(R)). The technique was demonstrated on devices fabricated with different postdeposition annealing (PDA) conditions. It was found that, regardless of the PDA condition, the N-ot in high-k dielectric was more responsible for the NBTI behavior than the Nit, but the contribution of N-it to NBTI increased as the stress continued because the generation rate of N-it was higher than that of N-ot.
URI
http://dspace.inha.ac.kr/handle/10505/1601
ISSN
0741-3106
Appears in Collections:
College of Engineering(공과대학) > Materials Science & Engineering (신소재공학) > Journal Papers, Reports(신소재공학 논문, 보고서)
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