Impact of device configuration on the temperature instability of Al–Zn–Sn–O thin film transistors

Title
Impact of device configuration on the temperature instability of Al–Zn–Sn–O thin film transistors
Authors
Jeong, Jae Kyeong
Keywords
temperature, Al-Zn-Sn-O, thin film transistors
Issue Date
2009-09
Publisher
American Institute of Physics
Abstract
We compared the effect of the temperature on the device stability of Al–Zn–Sn–O (AZTO) thin film transistors (TFTs) with top gate and bottom gate architectures. While the bottom gate device without any passivation layer on the AZTO channel layer showed a large threshold voltage (Vth) shift of 1.6 V after heating it from 298 to 398 K, the naturally passivated top gate device exhibited a smaller Vth shift of 0.6 V. This different behavior is discussed based on the concept of the thermal activation energy of the subthreshold drain current. It is proposed that the suitable passivation and lower interfacial trap density for the top gate TFT are responsible for its superior temperature stability compared to the bottom gate device.
URI
http://dspace.inha.ac.kr/handle/10505/1507
ISSN
0003-6951
Appears in Collections:
College of Engineering(공과대학) > Materials Science & Engineering (신소재공학) > Journal Papers, Reports(신소재공학 논문, 보고서)
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