Effects of a Gd capping layer on electrical characteristics of metal-oxide-semiconductor field effect transistors with a TaC gate electrode and a HfSiON gate dielectric

Title
Effects of a Gd capping layer on electrical characteristics of metal-oxide-semiconductor field effect transistors with a TaC gate electrode and a HfSiON gate dielectric
Authors
Jang, Tae-Young; Kim, Tea Wan; Jeong, Jae Kyeong; Choi, Rino
Keywords
Gd capping layer, Tac gate, HfSiON gate
Issue Date
2009-11
Publisher
American Institute of Physics
Abstract
Effects of Gd capping of HfSiON gate dielectric on the characteristics of n metal-oxide-semiconductor field effect transistor nMOSFET with TaC gate electrode were investigated. MOSFETs with an in situ deposited Gd/TaC bilayer demonstrated a reduced equivalent oxide thickness, 0.9 nm, and low VTH, 0.25 V, compared with MOSFETs without Gd capping layer. Backside secondary ion mass spectroscopy revealed that Gd atoms were diffused into the high-k gate dielectric and interfacial layer between high-k dielectric and Si substrate. The dipole moment at the high-k /SiO2 interface due to Hf–O and RE–O bonds is used to explain the VTH change.
URI
http://dspace.inha.ac.kr/handle/10505/1504
ISSN
0003-6951
Appears in Collections:
College of Engineering(공과대학) > Materials Science & Engineering (신소재공학) > Journal Papers, Reports(신소재공학 논문, 보고서)
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